Keysight Technologies, Inc. has introduced a new bit error rate (BER) contour analysis tool that helps memory designers perform DDR4 and LPDDR4 JEDEC compliance measurements. Designers are now able to make data valid window measurement with components of noise and jitter to ensure valid and accurate data transfer. The BER contour analysis tool is a capability added to the E2688A Serial Data Analysis software and runs on Keysight Infiniium S-Series, 90000A, V-Series and Z-Series oscilloscopes.
Historically, double data rate (DDR) has defined its timing specifications with a belief of a zero BER. Latest DDR technology offers data rates of 3.2Gb/s or higher. Each picosecond now matters and can be the difference in passing and failing bits. At these high data rates, noise and jitter affect the signal integrity. Measuring and understanding the components of noise and jitter can enable designers to maximize the margin to ensure valid and accurate data transfer. The timing parameters specific to the BER contour analysis in accordance to the JEEC specification are timing data input valid window (TdiVW) and voltage data input valid window (VdiVW).
Keysight
keysight.com
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