• Skip to primary navigation
  • Skip to main content
  • Skip to primary sidebar
  • Skip to footer
  • Advertise
  • Subscribe

Test & Measurement Tips

Oscilloscopes, electronics engineering industry news, how-to EE articles and electronics resources

  • Oscilloscopes
    • Analog Oscilloscope
    • Digital Oscilloscope
    • Handheld Oscilloscope
    • Mixed-signal Oscilloscope
    • PC-based Oscilloscopes – PCO
  • Design
  • Calibration
  • Meters & Testers
  • Test Equipment
  • Learn
    • eBooks/Tech Tips
    • FAQs
    • EE Training Days
    • Learning Center
    • Tech Toolboxes
    • Webinars & Digital Events
  • Video
    • EE Videos
    • Teardown Videos
  • Resources
    • Design Guide Library
    • Digital Issues
    • Engineering Diversity & Inclusion
    • Leap Awards
    • White Papers
  • Subscribe
You are here: Home / Featured / How to choose analog-signal-chain components: part 2

How to choose analog-signal-chain components: part 2

July 9, 2025 By Rick Nelson Leave a Comment

Signal conditioning can prepare a sensor’s output for digitization.

Figure 1. An op amp in the basic inverting configuration provides a gain of -RFB/RIN.

In part 1 of this series, we looked at a typical analog signal chain that you can use in conjunction with analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). A key building block of the analog signal chain is the operational amplifier (op amp), shown in its basic inverting configuration in Figure 1, where the gain is the negative of the feedback resistor RFB divided by the input resistor RIN.

Q: How do we derive the gain?
A: First, note that an ideal op amp has an infinite open-loop gain and infinite input impedance, so during normal operation (when the device is not saturated), both inputs will be at ground. Consequently, the current through RIN is VIN/RIN, and by Kirchoff’s current law, that current must flow through RFB., so:

and

Q: What is RB?
A: Real op amps don’t have infinite input impedance and will draw an input bias current[1], disturbing the voltage at the inverting input. If you are using a CMOS op amp, you might not need RB because the input bias currents are low. However, for test-and-measurement applications, you’ll probably want to choose amplifiers with bipolar input stages to take advantage of their low noise and other performance benefits[2]. If the bias currents on the inverting and noninverting inputs are close to the same value (a good bet for input stages fabricated on the same die), you can add an RB whose value equals that of RFB and RIN in parallel.

Q: What are some other op amp configurations?
A: Figure 2a shows a voltage follower, or unity-gain buffer. This configuration is useful if, for example, you have a sensor that needs to drive a low-impedance load. Figure 2b shows a differential amplifier. Here, the output is (V1–V2)(R2/R1). Note that the output only depends on the difference between the input voltages. If all the resistors in the circuit are equal, giving us a unity-gain difference amplifier, and if V1 is 1 V and V2 is 4 V, then the output will be 3 V. Similarly if V1 is 11 V and V2 is 14 V, the output is still 3 V. In the latter case, the amplifier rejects the additional 10 V common to both inputs, called the common-mode voltage.

Figure 2. An op amp can be used as a voltage follower (a) or differential amplifier (b).

Q: What is a practical application of the differential amplifier?
A: Figure 3 shows a load powered by a battery, with a differential amplifier used to measure the current flowing through a high-side sense resistor RSENSE. This current-measuring capability can be used as part of a control loop for diagnostics or to initiate a current-limit function when a threshold is passed.

Figure 3. A differential amplifier can monitor the load current flowing through a high-side sense resistor.

Q: Why can’t we put the sense resistor on the low side?
A: We could do that and use our single-ended amplifier from Figure 1 to monitor the current, as shown in Figure 4. This approach, however, has two problems. First, it creates a floating ground for the load (shown in blue) that differs from the earth/system ground. This may be acceptable for some applications because the voltage across the resistor will be low, generally in the millivolt range. That voltage, however, depends on load current, which may be very noisy if the load contains high-speed logic or power-switching transistors in DC/DC converters, resulting in excessive electromagnetic interference (EMI). The floating ground can also create problems if the load must communicate with other subcircuits in the system — including the current-sense amplifier itself.

Figure 4. A low-side sense resistor creates a floating ground for the load (blue) and is unable to detect load-to-system-ground shorts (red).

The second problem is that the low-side resistor is poorly placed to detect overcurrent fault conditions. For example, if a short to system ground occurs within the load, the short-circuit current will bypass the sense resistor, as shown in red in the figure, and the system will not be able to initiate corrective action. In general, it’s good to use high-side sense resistors whenever possible.

Q: What else can we do with op amps?
A: In part 3, we’ll look at some op-amp-based filters as alternatives to digital filters.

References

[1] Op Amp Input Bias Current, Analog Devices
[2] Trade-offs Between CMOS, JFET, and Bipolar Input Stage Technology, Texas Instruments

Related EE World content

How to separate differential and common-mode harmonic noise currents
Sorting out balanced cables and differential signaling
When to use NPN and PNP transistors and FETs
When to buffer and when to drive signals?
FAQ on high-side vs. low-side load switching: part 1
If you are working with sensors here are some tools to consider: Part 1

You may also like:


  • How to choose analog-signal-chain components: part 1

  • Understanding ADC specs and architectures: part 5

  • Understanding ADC specs and architectures: part 4

  • Understanding ADC specs and architectures: part 3

  • Understanding ADC specs and architectures: part 2

  • Understanding ADC specs and architectures: part 1

Filed Under: FAQ, Featured Tagged With: FAQ

Reader Interactions

Leave a Reply Cancel reply

You must be logged in to post a comment.

Primary Sidebar

Featured Contributions

Why engineers need IC ESD and TLP data

Verify, test, and troubleshoot 5G Wi-Fi FWA gateways

How to build and manage a top-notch test team

How to use remote sensing for DC programmable power supplies

The factors of accurate measurements

More Featured Contributions

EE TECH TOOLBOX

“ee
Tech Toolbox: Connectivity
AI and high-performance computing demand interconnects that can handle massive data throughput without bottlenecks. This Tech Toolbox explores the connector technologies enabling ML systems, from high-speed board-to-board and PCIe interfaces to in-package optical interconnects and twin-axial assemblies.

EE TRAINING CENTER

EE Learning Center
“test
EXPAND YOUR KNOWLEDGE AND STAY CONNECTED
Get the latest info on technologies, tools and strategies for EE professionals.
bills blog

RSS Current Electro-Tech-Online.com Discussions

  • Steering angle sensor question
  • factory device from 2017'ish with web ui - too old to function with Microsoft Edge ?
  • renewed interest in old project I call it WICKED 8
  • flexible copper cable
  • Sears 40/20 200amp starter/battery charger switch pinout

Footer

EE World Online Network

  • 5G Technology World
  • EE World Online
  • Engineers Garage
  • Analog IC Tips
  • Battery Power Tips
  • Connector Tips
  • EDA Board Forums
  • Electro Tech Online Forums
  • EV Engineering
  • Microcontroller Tips
  • Power Electronic Tips
  • Sensor Tips

Test & Measurement Tips

  • Subscribe to our newsletter
  • Advertise with us
  • Contact us
  • About us

Copyright © 2026 · WTWH Media LLC and its licensors. All rights reserved.
The material on this site may not be reproduced, distributed, transmitted, cached or otherwise used, except with the prior written permission of WTWH Media.

Privacy Policy