Ultra-compact logic analyzers sport large data buffer, built-in bus receivers for serial decoding

The Ikalogic SP2 Series of compact 9-channel 200-MHz logic analyzers offer in-depth analysis of logic signals and protocol decoding with 200-MHz (5 nsec) timing resolution. The nine-channel design allows 8-bit parallel data to be captured along with a clock or strobe signal at the maximum sampling rate without any trade-off between the number of active channels and the sampling rate. This is possible due to an embedded 2-Gb memory that buffers the captured signals before sending to the attached PC. Powerful trigger options are provided, including: edge trigger, logic change on one or various channels, trigger on timed logic signals sequence, trigger on protocol word or event (e.g. serial word or I2C address acknowledge), external trigger input, etc.

The SP2 series makes it easy to analyze CMOS logic signals and industrial buses. The series consists of two devices: the SP209 is the standard edition and the SP209i is an industrial version with specialized receivers for most common industrial busses like RS485, RS232 or CAN. The Trigger-in and Trigger-out SMA connectors allow users to synchronize the SP209 to other lab equipment, building highly sophisticated test setups. The Spartan 6 FPGA design provides the processing power required and can easily be firmware-updated.

The SP2 series logic analyzers use the supplied ScanaStudio software (Windows, Mac and Linux) to capture, display, analyze, and decode signals. Most industry standard protocols can be decoded, including: SPI, I²C, USART, 1-Wire, CAN, LIN, I2C, RS232, RS485, TWI and more. The software allows users to capture very long sequences of logic signals (up to 2 Tera samples), or view decoded signals in various levels of abstraction (packets or detailed bits and bytes). It also enables targeting very specific events due to the versatile multi-stage trigger system. The SP2 series logic analyzers compress and stream captured signals via USB 2.0 to an attached Windows, Linux or MacOS computer. USB bandwidth can be variable from system to system, with a practical limitation of 20 MB/sec. SP2 logic analyzers have an embedded 2 Gb DDR-3 memory which buffers captured samples at 1.6 GB/sec to avoid these USB limitations.

The SP209 series of logic analyzers are well-suited to applications such as embedded systems development and debugging, R&D, education, protocol analysis, reverse engineering, etc. Made by Ikalogic, a growing European embedded test equipment manufacturer, the IkaScope SP2 Logic Analyzers are available now from Saelig Company, Inc. Fairport, NY. For detailed specifications, free technical assistance, or additional information, please contact Saelig at 1-888-7SAELIG, via email: info@saelig.com, or visit www.saelig.com.