Tessent Connect is an innovative design-for-test (DFT) automation methodology that delivers intent-driven hierarchical test implementation that helps IC design teams achieve manufacturing test quality goals faster and with fewer resources compared to traditional DFT methods.
Today’s advanced IC designs can achieve high defect coverage for manufacturing and in-system test by integrating dedicated on-chip infrastructure such as embedded compression, built-in self-test, and IEEE 1687 IJTAG networks. As IC designs grow in size and more of this on-chip IP is integrated, engineers have increasingly adopted hierarchical DFT approaches that break down the traditional DFT process into smaller, more manageable elements. However, retrofitting existing flows and automation to use hierarchical components and technologies often presents new sets of time-consuming and expensive inefficiencies.
Designed from the ground up to support hierarchical DFT, Mentor’s Tessent Connect automation approach helps eliminate these design inefficiencies. With Tessent Connect, IC designers interact with the Tessent software design tools using a higher level of abstraction, which describes the intended result rather than step-by-step instructions. The benefits of this abstraction-based approach include seamless collaboration across disparate DFT teams, plug-and-play reuse of IC components, significantly shorter turn-around times and the automation of many time-consuming setup, connectivity and pattern generation tasks.
Additionally, Mentor’s new Tessent Connect Quickstart program offers expertise in delivering customized insights and services that help IC design teams fully optimize and automate their DFT processes when using Tessent Connect.
“Our customers are continuously looking to reduce their test implementation costs as their design sizes grow and quality requirements become more stringent,” said Brady Benware, vice president and general manager for the Tessent product family at Mentor, a Siemens business. “With Tessent Connect and the corresponding Quickstart program, our customers are empowered with an accelerated and automated path to DFT sign-off.”
Mentor Graphics Corporation, a Siemens business, 8005 S.W. Boeckman Road, Wilsonville, OR 97070-7777, https://www.mentor.com/products/silicon-yield/tessent/